||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||| ||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||| supervisory circuit 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 1 pt7m6314us features ? highly accurate: ? 1.5% (25c) ? detect voltage range: 1.8 to 5v in 100mv increments ? operating voltage range: 1.0v ~ 5.5v ? operating temperature range: - 40c to + 85c ? detect voltage temperature characteristics: ? 2.5% ? typ ? output configuration: bi - d ir ? four reset time out period available: ? typical 1.6 ms for pt7m631 4 usxxd 1; ? typical 26ms for pt7m6314usxxd2; ? typical 200ms for pt7m631 4 usxxd 3; ? typical 1570ms for pt7m631 4 usxxd4 ; general description the series are designed to monitor power supplies in p and digital systems. it provides excellent circuit reliability and low cost by eliminating external components and adjustments, and a debounced manual reset input. this device performs a single function: it asserts a reset signal whenever the v cc supply vo ltage falls below a preset threshold or whenever manual reset is asserted. reset remains asserted for an internally programmed interval (reset timeout period) after v cc has risen above the reset threshold or manual reset is de - asserted. pt7m6314usxx are b idirectional output, allowing it to be directly connected to p with bidirectional reset inputs. the serials come with factory - trimmed reset threshold voltages in 100mv increments from 2.5v to 5v. preset timeout periods of 200ms and 1570ms (typ.) are avail able. pin configuration pin description name type description rst i/o reset output and pushbutton input: rst is asserted when v cc drops below voltage threshold v th - . active low. when other devices pull rst low, the device will speed it s rising edge once the reset condition release. mr i manual reset: a logic low on mr asserts reset. reset remains asserted as long as mr is low, and for the reset timeout period (t rs ) after the reset conditions are terminated. connect to v cc if not us ed. gnd p ground v cc p supply voltage. 1 2 v cc rst gnd 3 4 mr pt7m6315usxxd3f/d4f sot143-4
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 2 pt7m6314us supervisory circuit maximum ratings storage temperature ............................................................ - 65 ? c to +150 ? c ambient temperature with power applied .......................... - 40 ? c to +85 ? c supply voltag e to ground potential (vcc to gnd) .............. - 0.3v to +7.0v dc input voltage (all inputs except vcc and gnd)...... - 0.3v to v cc +0.3v dc output current (all outputs) ..........................................................30ma power dissipation ....... ................................... 320mw (depend on package) dc electrical characteristics (t a = - 40~85oc, unless otherwise noted. typical values are at t a = +25oc) description sym. test conditions min . typ . max . unit supply voltage v cc 1.0 5.5 v su pply current i cc v cc = 5.5v. no load. 12 a v cc = 3.6v. no load. 10 a voltage threshold v th - +25 ? th - ) ? th - (v th - ) ? ? ? th - ) ? th - (v th - ) ? hys v th+ - v th - * 50 mv output driving output lo w v ol i oh = 8ma, v cc = 5v 0.4 v i oh = 4ma, v cc = 3v 0.3 i oh = - 50a, v cc = 1v 0.09 i nternal pull - up resistor r p mr 32 63 100 k ? cc = 3v. - 11 20 k ? cc = 5 v. - 5 10 input high voltage v ih mr v cc < 4v 0.7 vcc v v cc > 4v 2.4 input low voltage v il mr v cc < 4v 0.3vcc v v cc > 4v 0.8 rst active pull - up enable threshold v thup v cc = 5v 0.7 0.9 1.2 v rst active pull - up current v cc = 3.3v 20 ma note: v th - is voltage threshold when v cc falls from high to low. v th+ is voltage threshold when v cc rises from low to high. note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi - tions above those indicated in the operational sec - tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 3 pt7m6314us supervisory circuit ac electrical characteristics timing diagram (v cc = 1.0v to 5.5v, t a = - 40~85oc, unless otherwise noted. typical valu es are at t a = +25oc) sym. description test conditions part no. min . typ . max . unit t rs reset timeout period 6314usxxd 1 1 1.6 2 .2 ms 6314usxxd 2 1 7 2 6 40 ms 6314usxxd3 140 200 280 ms 6314usxxd4 1120 1570 2240 ms t rpd delay 10 ns t sen sensitivity 20 ? md mr to reset delay 500 ns t mr mr pulse width 1 ? s external pull d own signal pulse rst pin 1 ? r rst output rise time v cc = 3v c load = 120pf 333 ns c load = 250pf 666 v cc = 5v c load = 200pf 3 33 c load = 400pf 666 t r vcc rst v rst 1v 0v t rs 1v 0v uncertain state 0.5v t s 0.8v cc external pull down signal release 0.5v vcc v rst 1 v 0 v t rs t sen t rs t rpd 1 v 0 v uncertain state mr t mr 0 v t rs 0 . 8 v rst t md v ih
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 4 pt7m6314us supervisory circuit block diagram function description power monitor a microprocessors (ps) reset input starts the p in a known state. whenever the p is in an unknown state, it should be held in reset. t he supervisory circuits assert reset during power - up and prevent code execution errors during power - down or brownout conditions. on power - up, once vcc reaches about 1 . 0 v, rst is a guaranteed logic low of 0.4v or less. as vcc rises, rst stays low. wh en vcc rises above the reset threshold v rst , an internal timer releases rst after about 1570ms (pt7m6314usxx d4 ) . rst asserts whenever vcc drops below the reset threshold, i.e. brownout condition. if brownout occurs in the middle of a previously initiated r eset pulse, the pulse continues for at least another 1.6ms or 26ms or 200ms or 1570ms (pt7m6314usxx d4 ) . on power - down, once vcc falls below the reset threshold, rst stays low and is guaranteed to be 0.4v or less until vcc drops below 1v. m anual reset t he manual - reset input (mr) allows reset to be triggered by a pushbutton switch. the switch is effectively debounced by the 1.6 ms (pt7m6314usxxd 1 ) or 2 6 ms (pt7m6314usxxd 2 ) or 200ms (pt7m6314usxxd3) or 1570ms (pt7m6314usxx d4 ) reset pulse width. reset output : bi - direction the pt7m6314usxxs reset output is designed to interface with ps that have bidirectional reset pins, such as the motorola 68hc11. like an open - drain output, the pt7m6314usxx allows the p or other devices to pull rst low and assert a res et condition. however, unlike a standard open - drain output, it includes the commonly specified 5k ? pull - up resistor with a p - channel active pull - up in parallel. this structure can speed the rising edge when the reset condition releases. the reset condition will occur when vcc drops below the reset threshold, or manual reset is set to ground, or rst is pulled down. t . c . r e f e r e n c e 4 u s o n e - s h o t l o g i c c o n t r o l & t i m i n g d e l a y v c c g n d 5 k ? r s t v c c r e s i s t o r d i v i d e r m r 6 3 k ?
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 5 pt7m6314us supervisory circuit application information typical operation circuit fig 6. pt7 m6314usxx application example pt7m6314usxx vcc rst mr c stray vcc 68hc11 c in reset circuit other devices
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 6 pt7m6314us supervisory circuit mechanical information sot143 - 4 ordering information part number package code package pt7m6314usxx d 1 tbe x tb lead free and green sot143 - 4 , tape & reel pt7m6314usxx d 2 tbe x tb lead free and green sot143 - 4 , tape & reel pt7m6314usxx d3 tbe x tb lead free and green sot143 - 4 , tape & reel pt7m6314usxx d 4 tbe x tb lead free and green sot143 - 4 , tape & reel note: ? xx refer to voltage range, see below table 1. ? e=lead - free and green packaging ? adding x suffix=tape/reel ? contact pericom for availability.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 7 pt7m6314us supervisory circuit table 1 suffix xx definition of pt7m6314usxx suffix xx v th - (v) suffix xx v th - (v) suffix xx v th - (v) suffix xx v th - (v) 25 2.5 32 3.2 39 3.9 46 4.6 26 2.6 33 3.3 40 4.0 47 4.7 27 2.7 34 3.4 41 4.1 48 4.8 28 2.8 35 3.5 42 4.2 49 4.9 29 2.9 36 3.6 43 4.3 50 5.0 30 3.0 37 3.7 44 4.4 31 3.1 38 3.8 45 4.5 sot - 143 package top marking instruction sample: aalj part no.: pt7m 6314us25d3 date code: year 2003 ww10 sy lj part no. 2 bit code (see table 2) date code year & work week
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| | |||||||||||||||||||||||||||||||||||||||||||||||| 201 6 - 0 1 - 00 0 3 pt01 96 - 6 0 1 / 1 5 /1 6 8 pt7m6314us supervisory circuit table2 part no. code part no. c ode part no. code pt7m6314us25d3 sy pt7m6314us34d3 ui pt7m6314us43d3 vs pt7m6314us25d4 sz pt7m6314us34d4 uj pt7m6314us43d4 vt pt7m6314us26d3 tc pt7m6314us35d3 um pt7m6314us44d3 vw pt7m6314us26d4 td pt7m6314us35d4 un pt7m6314us44d4 vx pt7m6314us27d3 tg pt7m6314us36d3 uq pt7m6314us45d3 wa pt7m6314us27d4 th pt7m6314us36d4 ur pt7m6314us45d4 wb pt7m6314us28d3 tk pt7m6314us37d3 uu pt7m6314us46d3 we pt7m6314us28d4 tl pt7m6314us37d4 uv pt7m6314us46d4 wf pt7m6314us29d3 to pt7m6314us38d3 uy pt7m6314us47d3 wi pt7m6314us29d4 tp pt7m6314us38d4 uz pt7m6314us47d4 wj pt7m6314us30d3 ts pt7m6314us39d3 vc pt7m6314us48d3 wm pt7m6314us30d4 tt pt7m6314us39d4 vd pt7m6314us48d4 wn pt7m6314us31d3 tw PT7M6314US40D3 vg pt7m6314us49d3 wq pt7m6314us31d4 tx pt7m6314us40d4 v h pt7m6314us49d4 wr pt7m6314us32d3 ua pt7m6314us41d3 vk pt7m6314us50d3 wu pt7m6314us32d4 ub pt7m6314us41d4 vl pt7m6314us50d4 wv pt7m6314us33d3 ue pt7m6314us42d3 vo pt7m6314us33d4 uf pt7m6314us42d4 vp pericom semicond uctor corporation ? 1 - 800 - 435 - 2336 ? www.pericom.com pericom technology incorporation reserves the right to make changes to its products or specifications at any time, without no tice, in order to improve design or per formance and to supply the best possible product. pericom technology does not assume any responsibility for use of any circui try described other than the circuitry embodied in pericom technology product. the company makes no representations that circuitry described herein is free from patent infringement or other rights, of pericom technology incorporation.
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